13-bit GaAs serial-to-parallel converter with compact layout for core-chip applications

Design and characterization of a 13 bit serial-to-parallel converter in GaAs technology for smart antennas are presented. The circuit has been realized with NOR-based super-buffered enhancement/depletion logic, and optimized for a compact layout. The serial-to-parallel converter operates properly well above the 20 kHz design clock frequenc

Ultralow-Power Digital Control and Signal Conditioning in GaAs MMIC Core Chip for X-Band AESA Systems

This work presents the design and characterization of an ultralow-power core chip for electronically scanned arrays at X-band, implemented in 0.25-/0.5-μm E-/D-mode gallium arsenide (GaAs) pHEMT technology. In particular, design details are given about the two core functional blocks embedded in the microwave monolithic integrated circuit (MMIC): a 12-bit phase and amplitude control circuit and an 18-bit serial-to-parallel (S2P) interface. The S2P interface was designed resorting to a custom symmetric device model, expressly conceived for the time-domain simulations required for digital circuits. Due to the adoption of a differential structure with resistive pull-ups, it achieves a state-of-the-art power consumption of 2.2 mW/bit and nearly 87% yield. The analog circuit includes a 6-bit phase shifter (PS) and a 6-bit attenuator. To mitigate risks, two different PS architectures have been developed and are compared in this work, discussing advantages and drawbacks of the different solutions. Since the two designs share the same target specifications, a truly fair comparison can be made not only in terms of performance but also concerning robustness and repeatability, thus providing useful guidelines for the selection of the most appropriate strategy. In particular, it is shown that one architecture outperforms the other by about 2 dB and 1.5° in terms of insertion loss and rms phase error, respectively

Characterization and modelling of high-frequency active devices oriented to high-sensitivity subsystem design

In this chapter, quite a broad overview of noise characterization-related topics is offered to the reader, with different depth levels. Most of the attention, however, is paid to the practical side of noise measurements and the subsequent steps of noise extraction and modeling, as well as to some advanced design methodologies. A major concern is in the procedures that are necessary to effectively de-embed the measurements from the contribution of the test bench and the adopted methodologies. The scope of the discussion cover a well-assessed theory concerning linear devices operated in the frequency range from a few megahertz to some 100 GHz, and at physical temperatures above some tens of kelvins. In these conditions, 1/f noise can be neglected and Johnson (thermal) noise is approximately independent of frequency; as a consequence, thermal and, possibly, shot noise of elemental noise sources add up to yield a white power spectrum, which can be conveniently described in terms of “equivalent” thermal noise. The second part of the chapter is devoted to the application of the device noise models in the proper design of single- and multistage low noise amplifiers, including a mixed technique that actually employs characterization techniques directly in the amplifier design

UWB Channel Model Report

An extensive measurement campaign has been carried out in the 4th floor of the Electronic Engineering Department of the University of Rome Tor Vergata. The measurement plan was described in the report numbered W03-02-0011-R03, available on the ULTRAWAVES private website. In this document we describe the first measurement campaign based on the use of the preliminary DVP purchased from Wisair. Such a campaign is based on time domain measurements. As stated in our original measurement plan, we tried two different techniques to sound the channel: - first by pulses - then by PN-sequences We compared the channel responses obtained by the two techniques. The PN-sequence channel sounding gave the best performance, and then we decided to base our measurement campaign on this channel sounding technique. We will show the channel impulse response by PN-sequence sounding (actually some post-processing must be applied to the raw data obtained by this technique to get the impulse response). The channel measurements were done in many rooms. The transmitter was moved in four different positions in the corridor. The receiver was moved in many different positions, so that the large scale and small-scale effects were evidenced. Also measurements in line-of-sight and nonline-of-sight conditions were made

The role of path loss on the selection of the operating bands of UWB systems

We performed a propagation experiment in a modern office building in Rome, Italy. The propagation measurements are based on the use of a vector network analyzer (VNA) over the band 2-12 GHz, with a frequency resolution of 5 MHz. We propose a novel analysis of the dependence of path loss laws on the carrier frequency and bandwidth. Our experimental results show that the path loss exponent strongly depends on the carrier frequency. The path loss exponents increase with the increasing carrier frequency for the line-of-sight (LOS) scenarios, while exhibit an opposite behavior for the non-line-of-sight (NLOS) data. We explain this behavior by the frequency dependence of the reflection coefficient of the walls surrounding the transmitter. Indeed, the lowest frequencies (2-5 GHz) are reflected, while the highest frequencies (up to 12 GHz) pass through the walls

A Novel Approach to Minimize RMS Errors in Multi-Functional Chips

In this contribution, a novel approach, based on single cells permutations, is presented for the minimization of RMS errors in digitally controlled subsystems. The method is described and demonstrated for phase-shifting functionalities, but it can be easily applied to different subsystems. By using the proposed approach, the designer is able to choose the best cell configuration, fulfilling arbitrary specification goals. An X-band GaAs multifunctional chip (MFC) for T/R Module applications, composed by a six-bit phase shifter, six-bit attenuator, T/R switch, and on-board serial-to-parallel converter has been designed, realized, tested, and presented here as a test vehicle of the methodology. Measured results include a 4.5° maximum RMS phase error, 1.2 dB maximum RMS spurious amplitude error, and better than 13 dB input and output return losses for all phase and amplitude settings over the whole 9.0-10.2 GHz operating bandwidth. © 2012 Wiley Periodicals, Inc

Millimeter wave low noise amplifier for satellite and radio astronomy applications

The the design, realization and testing of a Q-band and a W-band LNA (Low Noise Amplifier) utilizing the 70nm mHEMT (metamorphic High Electron Mobility Transistor) foundry process by OMMIC, are reported. Details on measurement set-up and obtained performances are presented

High spectral purity X- to W-band active GaAs monolithic frequency multiplier

In this contribution, an active high harmonic suppression x8 frequency multiplier using depletion-mode mHEMT devices and its design procedure are presented. The realized circuit exhibits 3 dB conversion gain in the 86.4 ÷ 91.2 GHz output frequency range, with 6 dBm output power. An harmonic suppression higher than 32 dBc has been achieved. The whole chip current consumption is 125 mA, occupying an area of 2.05 × 3.45 mm2. © 2014 IEEE

Automated Extraction of Device Noise Parameters Based on Multi-Frequency, Source- Pull Data

In this paper a novel approach for determining the four noise parameters of FET devices over frequency is presented. Such methodology is made of two parts: the first one allows to straightforwardly extract single-frequency noise parameters from source-pull data; the second one extends this capability to multi-frequency, source-pull data to obtain a full description of device noise behavior over frequency by means of at most 10 constant parameters (depending on the required accuracy). The whole process is automated via a software routine and does not need a previous knowledge of the FET equivalent circuit's topology, or the values of its elements. This peculiarity makes the proposed method very well suited to quick characterization campaigns of active devices, avoiding the burden of a whole set of prior, different measurements and the relevant, critical extraction procedures, which are strongly dependent on the device